PCB Trace Width: How to Size Traces for Current, Heat and Voltage
How to size PCB trace width for current: IPC-2221 formula, IPC-2152 guidance, a quick width table, copper thickness, inner vs outer layers and spacing.
How to size PCB trace width for current: IPC-2221 formula, IPC-2152 guidance, a quick width table, copper thickness, inner vs outer layers and spacing.

Short answer: PCB trace width sets how much current a copper trace can carry before it heats up too much. The classic IPC-2221 formula gives about 0.30 mm (12 mil) per amp on a 1 oz outer layer for a 10 °C temperature rise, and wider for inner layers, thinner copper or a lower allowed rise. The newer IPC-2152 standard replaces the old charts with test data that also accounts for board thickness and nearby copper planes, and it’s the better reference for high current PCB design. Pick the width from current and allowed temperature rise first, then check voltage drop, impedance, spacing and your fabricator’s limits. AI design tools help by reading each part’s current from its datasheet and flagging every net whose trace is too narrow before fabrication.
Every copper trace has resistance. When current flows, that resistance turns into heat and voltage drop. A trace that’s too narrow for its current runs hot, which can lift copper, darken the laminate, shift nearby component values and, in the worst case, act like a fuse. Even when it doesn’t fail, it drops voltage that your regulator or load never sees.
Too wide has a cost as well. Wide traces eat routing space, make dense boards harder to route and change the impedance of signal lines. The goal isn’t “as wide as possible”. It’s the right width for each net’s current, temperature budget and electrical role.
Four things decide how much current a trace can carry:
For decades, designers have used the formula in IPC-2221, derived from old charts:
I = k × ΔT^0.44 × A^0.725
Here I is current in amps, ΔT is temperature rise in °C, A is cross-sectional area in square mils, and k is 0.048 for outer layers or 0.024 for inner layers. To get width, solve for A and divide by the copper thickness: 1 oz copper is about 1.378 mil (35 µm) thick.
Most online trace width calculators use exactly this formula. The table below shows its results for a 10 °C rise:
| Current | 1 oz outer layer | 2 oz outer layer | 1 oz inner layer |
|---|---|---|---|
| 0.5 A | 0.12 mm (4.5 mil) | 0.06 mm (2.3 mil) | 0.30 mm (11.8 mil) |
| 1 A | 0.30 mm (11.8 mil) | 0.15 mm (5.9 mil) | 0.78 mm (30.8 mil) |
| 2 A | 0.78 mm (30.8 mil) | 0.39 mm (15.4 mil) | 2.03 mm (80 mil) |
| 3 A | 1.37 mm (53.8 mil) | 0.68 mm (26.9 mil) | 3.56 mm (140 mil) |
| 5 A | 2.77 mm (109 mil) | 1.38 mm (54.4 mil) | 7.19 mm (283 mil) |
Treat these as a starting point, not a guarantee. Fabricators also have a minimum trace width, often around 0.1 to 0.15 mm on standard processes, so very small calculated widths get rounded up anyway.
IPC-2152, published in 2009, came from new thermal testing and replaces the IPC-2221 charts for current capacity. Its main lessons are practical:
If you’re doing high current PCB design, use a trace width calculator that supports IPC-2152, or your EDA tool’s built-in version, and enter your real board thickness and plane layout. The IPC-2221 numbers above remain a safe, conservative check.

PCB trace thickness is set by copper weight. Standard boards use 1 oz copper (about 35 µm) on outer layers and often 0.5 oz or 1 oz on inner layers. Moving a power layer to 2 oz copper halves the width you need for the same current, which can be the only way to fit a power path through a crowded area.
Heavier copper isn’t free. It costs more, needs wider minimum spacing and etches less precisely, so fine-pitch parts on the same layer get harder. A common compromise is heavy copper on one or two power layers and standard copper everywhere else. Remember too that outer layers are plated, so their final thickness is usually a bit more than the base foil.
A trace can be thermally fine and still too narrow. Check two more things:
Width and spacing go together. Spacing between conductors depends on the voltage between them, whether the traces are on an outer or inner layer, and whether the board is coated. IPC-2221 gives minimum clearance tables by voltage, and safety standards for mains-powered products often require more. For low-voltage digital signals, spacing is usually limited by crosstalk and the fabricator’s capability rather than by voltage. For mains, motor drives and high-voltage supplies, use the clearance and creepage values from the relevant safety standard, not just the PCB rule of thumb.
Trace width errors are easy to make because the current in each net isn’t written on the schematic. An AI design assistant can read each component’s current rating from its datasheet, estimate the worst-case current on every power net, and suggest a width per net class using IPC-2152 or IPC-2221 for your actual stackup and copper weights. It can flag traces and vias that are too small, long power paths with excessive voltage drop, and spacing that doesn’t meet the voltage between nets. During component selection, it can also point out when a part’s current pushes you toward heavier copper, so you can plan the stackup before layout starts.
Using IPC-2221 with a 10 °C rise, about 0.30 mm (12 mil) on a 1 oz outer layer and about 0.78 mm (31 mil) on a 1 oz inner layer. IPC-2152 may allow narrower inner traces when planes are nearby.
IPC-2221 is a general PCB design standard whose current charts date back decades. IPC-2152 is a dedicated current-capacity standard based on newer testing that accounts for board thickness, copper planes and layer position.
Yes. Doubling copper from 1 oz to 2 oz roughly halves the width needed for the same current and temperature rise, at the cost of higher price and wider minimum spacing.
They’re good starting points. Most use the IPC-2221 formula, which is conservative. For high current designs, use an IPC-2152-based calculator with your real stackup and confirm with thermal measurement on the prototype.
AI can read component currents from datasheets, calculate the required width per net for your stackup, and flag narrow traces, undersized vias, voltage drop problems and spacing issues before fabrication.
Want every power net checked for the right trace width while you design? Talk to the IntelCAD team about AI-assisted PCB design and component selection for your next board.
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